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2.
Telephone
Interface and Number Encoding
MT
8870 forms the primary interface to the system by providing tolerance to small
frequency deviations and variations in the telephone line (Fig. 2). This ensures
an optimum combination of immunity to talk-off and tolerance to the presence of
interfering frequencies (third tones) and noise. When the detector recognises
the presence of two valid tones ESt output will go to an active state and any
subsequent loss of signal condition will cause ESt to assume an inactive state.
This information is relayed through PA5 of PIO to Z80 for number registration.
Before registration of a decoded tone pair, the DTMF receiver checks for a valid
signal duration. This check is performed by R12C5 time
constant driven by ESt. A logic high on ESt causes Vc ( Fig. 2) to
rise as the capacitor C5 discharges. Provided signal condition is maintained for
the validation period (t GTP ), and V c reaches the
threshold (VTSt ) of the
steering logic to register the tone pair, latching its corresponding 4-bit code
(see Table 1) into the output latch. At this point, the GT output is activated
and drives Vc to V DD. GT continues to drive high as long
as ESt remains high. Finally, after a short delay to allow the output latch to
settle, the delayed steering output flag (StD) goes high, signalling that a
received tone pair has been registered. The contents of the output latch are
made available on the 4-bit output bus to Port A of PIO by raising the three
state control input (TOE) to a logic high. The steering circuit works in reverse
to validate the interdigit pause between signals. Thus, as well as rejecting
signals too short to be considered valid, the receiver will tolerate signal
interruptions too short to be considered a valid pause. The internal clock
circuit is completed with the addition of an external 3.579545 MHz crystal which
is also common for Z80. V
TSt = 0.465V DD (the
nominal approximation provided by manufacturer) t
GTA =(R12C5 )In(V DD /V TSt )
= 2.74 ms (the
guard times for tone absent)
Fig.2 DTMF number encoding circuit and telephone interfacing to ITDL |
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